Question about reset and interrupt


#1

Hi all,

I am new to this forum. Hope someone can help me with the 2 questions below:

  1. The Proslic chip’s reset is active low. However, when I check the wcfxs.c code, it is writing a ‘1’ to the Tiger320 chip’s CTRL register (offset 0x00):

(in wcfxs_hardware_init function of wcfxs.c)
/* Signal Reset */
outb(0x01, wc->ioaddr + WC_CNTL);

I read the Tiger320 datasheet and it says (pg 21):
EXTRST# pin state
0 = External reset pin on PIB low
1 = External reset pin on PIB high

So it seems that wcfxs.c is causing a high (vcc) on the EXTRST# pin which connects to the Proslic chip. But since the Proslic expects active low reset, that will not reset the chip at all. Could someone help to explain this?

  1. External interrupts:

wcfxs.c masks off all external interrupts, e.g:
(in wcfxs_enable_interrupts function of wcfxs.c)
/* No external interrupts */
outb(0x00, wc->ioaddr + WC_MASK1);

Does this mean Asterisks work without the need of external interrupts from the Proslic chip? What happens when there is an external event (e.g. ring, off/on hook)? Does Asterisks work using the polling instead of interrupt? Or maybe Asterisks is polling for those external events during each DMA interrupt?

Regards,
Chek